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 TDA1566
I2C-bus controlled dual channel 46 W/2 , single channel 92 W/1 amplifier with load diagnostic features
Rev. 01 -- 5 April 2006 Product data sheet
1. General description
The TDA1566 is a car audio power amplifier with a complementary output stage realized in BCDMOS technology. The TDA1566 has two Bridge Tied Load (BTL) output stages and comes in a HSOP24 or DBS27P package. The TDA1566 can be controlled with or without I2C-bus. With I2C-bus control gain settings per channel and diagnostic trigger levels can be selected. Failure conditions as well as load identification can be read with I2C-bus. The load identification detects whether the outputs of a BTL channel are connected with a DC or AC load and discriminates between a speaker load, a line driver load and an open (unconnected) load. The TDA1566 can be configured in a single BTL mode and drive a 1 load. For the single BTL mode it is necessary to connect on the Printed-Circuit Board (PCB) the outputs of both BTL channels in parallel.
2. Features
I Operates in I2C-bus mode and non-I2C-bus mode I TH version: four I2C-bus addresses controlled by two pins; J version: two I2C-bus addresses controlled by one pin I Two 4 or 2 capable BTL channels or one 1 capable BTL channel I Low offset I Pop free off/standby/mute/operating mode transitions I Speaker fault detection I Selectable gain (26 dB and 16 dB) I In I2C-bus mode: N DC load detection: open, short and speaker or line driver present N AC load (tweeter) detection N Programmable trigger levels for DC and AC load detection N Per channel programmable gain (26 dB and 16 dB, selectable per channel) N Selectable diagnostic levels for clip detection and thermal pre-warning N Selectable information on the DIAG pin for clip information of each channel separately and independent enabling of thermal-, offset- or load fault I Independent short-circuit protection per channel I Loss of ground and open VP safe I All outputs short-circuit proof to VP, GND and across the load I All pins short-circuit proof to ground I Temperature controlled gain reduction at high junction temperatures
Philips Semiconductors
TDA1566
I2C-bus controlled dual channel/single channel amplifier
I Fault condition diagnosis per channel: short to ground, short to supply, shorted lead and speaker fault (wrongly connected) I Low battery voltage detection I TH version: pin compatible with the TDA8566TH1
3. Ordering information
Table 1. Ordering information Package Name TDA1566TH TDA1566J HSOP24 DBS27P Description plastic heatsink small outline package; 24 leads; low stand-off height plastic DIL-bent-SIL (special bent) power package; 27 leads; lead length 6.8 mm Version SOT566-3 SOT827-1 Type number
4. Block diagram
ADS2 8 ADS1 9 SDA 6 SCL 5 VP1 14 VP2 23 22 13 EN 7 MODE SELECT I 2 C-BUS SELECT DIAGNOSTIC /CLIP DETECT 1 DIAG
PROG CLIP
IN1+
10
16 MUTE 26 dB/ 16 dB 18
OUT1+ OUT1-
IN1-
11
MUTE
PROTECTION /DIAGNOSTIC
IN2+
2
19 MUTE 26 dB/ 16 dB 21 PROTECTION /DIAGNOSTIC
OUT2+ OUT2-
IN2-
3
VP MUTE
15
1OHM
TDA1566TH
24
TAB
4 SVR
12 SGND
17 PGND1
20 PGND2
001aac999
Fig 1. Block diagram (TDA1566TH)
TDA1566_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 5 April 2006
2 of 45
Philips Semiconductors
TDA1566
I2C-bus controlled dual channel/single channel amplifier
ADS1 2
SDA 26
SCL 25
VP1 7
VP2 21
20
PROG
EN
1
MODE SELECT
I 2 C-BUS
SELECT DIAGNOSTIC /CLIP DETECT
6
DIAG
IN1+
3
10 MUTE 26 dB/ 16 dB 13
OUT1+ OUT1-
IN1-
4
MUTE
PROTECTION /DIAGNOSTIC
IN2+
22
15 MUTE 26 dB/ 16 dB 18 PROTECTION /DIAGNOSTIC
OUT2+ OUT2-
IN2-
23
VP MUTE
9, 11, 14, 17, 19 8
n.c. 1OHM TAB
TDA1566J
27 24 SVR 5 SGND 12 PGND1 16 PGND2
001aad002
Fig 2. Block diagram (TDA1566J)
TDA1566_1
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Product data sheet
Rev. 01 -- 5 April 2006
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Philips Semiconductors
TDA1566
I2C-bus controlled dual channel/single channel amplifier
5. Pinning information
5.1 Pinning
TAB 24 VP2 23 PROG 22 OUT2- 21 PGND2 20 OUT2+ 19 OUT1- 18 PGND1 17 OUT1+ 16 1OHM 15 VP1 14 CLIP 13
001aad006
1 2 3 4 5
DIAG IN2+ IN2- SVR SCL SDA EN ADS2 ADS1
TDA1566TH
6 7 8 9
10 IN1+ 11 IN1- 12 SGND
Fig 3. Pin configuration for TDA1566TH (top view)
TDA1566_1
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Product data sheet
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Philips Semiconductors
TDA1566
I2C-bus controlled dual channel/single channel amplifier
EN ADS1 IN1+ IN1- SGND DIAG VP1 1OHM n.c.
1 2 3 4 5 6 7 8 9
OUT1+ 10 n.c. 11 PGND1 12 OUT1- 13 n.c. 14 OUT2+ 15 PGND2 16 n.c. 17 OUT2- 18 n.c. 19 PROG 20 VP2 21 IN2+ 22 IN2- 23 SVR 24 SCL 25 SDA 26 TAB 27
001aad007
TDA1566J
Fig 4. Pin configuration for non mounting base TDA1566J (front)
5.2 Pin description
Table 2. Symbol DIAG IN2+ IN2- SVR SCL SDA EN ADS2 ADS1 IN1+ IN1- SGND
TDA1566_1
Pin description TDA1566TH Pin 1 2 3 4 5 6 7 8 9 10 11 12 Description diagnostic output positive input channel 2 negative input channel 2 supply voltage ripple decoupling I2C-bus clock input I2C-bus data input/output enable input I2C-bus address select bit 2 I2C-bus address select bit 1 positive input channel 1 negative input channel 1 signal ground
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 5 April 2006
5 of 45
Philips Semiconductors
TDA1566
I2C-bus controlled dual channel/single channel amplifier
Pin description TDA1566TH ...continued Pin 13 14 15 16 17 18 19 20 21 22 23 24 Description clip detect and temperature pre-warning output supply voltage channel 1 1 select pin positive output channel 1 power ground channel 1 negative output channel 1 positive output channel 2 power ground channel 2 negative output channel 2 program input/output supply voltage channel 2 connect to PGND
Table 2. Symbol CLIP VP1 1OHM OUT1+ PGND1 OUT1- OUT2+ PGND2 OUT2- PROG VP2 TAB Table 3. Symbol EN ADS1 IN1+ IN1- SGND DIAG VP1 1OHM n.c. OUT1+ n.c. PGND1 OUT1- n.c. OUT2+ PGND2 n.c. OUT2- n.c. PROG VP2 IN2+ IN2- SVR
Pin description TDA1566J Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Description enable input I2C-bus address select bit 1 positive input channel 1 negative input channel 1 signal ground diagnostic output supply voltage channel 1 1 select pin not connected positive output channel 1 not connected power ground channel 1 negative output channel 1 not connected positive output channel 2 power ground channel 2 not connected negative output channel 2 not connected program input/output supply voltage channel 2 positive input channel 2 negative input channel 2 supply voltage ripple decoupling
TDA1566_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 5 April 2006
6 of 45
Philips Semiconductors
TDA1566
I2C-bus controlled dual channel/single channel amplifier
Pin description TDA1566J ...continued Pin 25 26 27 Description I2C-bus clock input I2C-bus data input/output connect to PGND
Table 3. Symbol SCL SDA TAB
6. Functional description
6.1 General
Naming conventions used in this document:
* Reference to bits in instruction bytes: IBx[Dy] refers to bit Dy of instruction byte x * Reference to bits in data bytes: DBx[Dy] refers to bit Dy of data byte x
6.1.1 Mode selection
The ADS1 pin selects the I2C-bus or non-I2C-bus mode operation as listed in Table 4. See Section 6.1.6 and Section 6.4.3 for the ADS1 pin functionality.
Table 4. Pin ADS1 Mode selection with the ADS1 pin Non-I2C-bus mode GND I2C-bus mode open or via 33 k to GND
Table 5 lists the control for the I2C-bus mode operation. In I2C-bus mode the EN pin operates at CMOS compatible LOW and HIGH logic levels. With the EN pin LOW the TDA1566 is switched off and the quiescent current is at its lowest value. With the enable pin HIGH the operation mode of the TDA1566 is selected with IB1[D0] and IB1[D1]. The I2C-bus instruction and data bytes are described in Section 6.4.2 and Section 6.4.3.
Table 5. EN pin HIGH (> 2.6 V) I2C-bus mode operation IB1[D0] 1 1 0 LOW (< 1.0 V) don't care IB2[D0] 0 1 don't care don't care Operation mode operating mute standby off
In non-I2C-bus mode the TDA1566 has 3 operation modes: off/mute/operation. The operation mode is selected with the EN pin. Figure 5 displays the required voltage levels at the EN pin in I2C-bus and non-I2C-bus mode. For the voltage levels see Section 9 "Characteristics".
TDA1566_1
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Product data sheet
Rev. 01 -- 5 April 2006
7 of 45
Philips Semiconductors
TDA1566
I2C-bus controlled dual channel/single channel amplifier
I2C-bus mode
off 0V 1.0 V 2.6 V
operation mode defined by IB1[D0] and IB2[D0] VP non-I2C-bus mode
off 0V 1.0 V 2.6 V
mute 4.5 V 6.5 V
operating VP
001aad008
Fig 5. Enable pin mode switching in I2C-bus and non-I2C-bus mode
6.1.2 Gain selection
The TDA1566 features a 16 dB and a 26 dB gain setting. The 16 dB setting is referred to as line driver mode, the 26 dB setting is referred to as amplifier mode. Table 6 shows how the gain is selected.
Table 6. I2C-bus Non-I2C-bus
[1] [2] [3] Channel 1. Channel 2. Both channels.
Gain select in I2C-bus and non-I2C-bus mode 16 dB IB3[D6] = 1 IB3[D5] = 1 PROG connected with 1.5 k to GND 26 dB IB3[D6] = 0[1] IB3[D5] = 0[2] PROG open[3]
Gain select
6.1.2.1
I2C-bus mode The gain is selected with IB3[D6] for channel 1 and IB3[D5] for channel 2. If the gain select is performed when the amplifier is muted, the gain select will be pop free. See Section 6.4.2 for the definition of the instruction bytes. If DC load detection is used, IB1[D1] = 1, auto gain select is activated. Detection of an open load (see Section 6.2.1) will result in a line driver mode setting. If the load detection data is invalid, IB3[D5] and IB3[D6] will define the gain setting.
6.1.2.2
Non-I2C-bus mode The gain for channel 1 and channel 2 is selected with the PROG pin. Leaving the pin unconnected selects 26 dB gain and connecting a resistor of 1500 between the PROG pin and GND selects 16 dB gain. When the amplifier is used in line driver mode loads of 2 and 4 can be driven. With a load larger than 25 a Zobel network of 33 nF in series with 22 should be connected between the amplifier output terminals. The Zobel network should be placed close to the output pins. To prevent instability in 1 mode the amplifier must not be used in line driver mode with a load larger than 25 .
TDA1566_1
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Product data sheet
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Philips Semiconductors
TDA1566
I2C-bus controlled dual channel/single channel amplifier
6.1.3 Balanced and unbalanced input sources
The TDA1566 accepts balanced as well as unbalanced input signals. Table 7 and Table 8 show the required hard or software setting and Figure 6 shows the input source connection. Note that the unbalanced input source should be connected to the positive BTL channel input. Note that the J version accepts in non-I2C-bus mode only a balanced input source.
Table 7. Source I2C-bus mode mode Non-I2C-bus Table 8. Source I2C-bus mode mode Non-I2C-bus Balanced and unbalanced input source setting TDA1566TH Balanced input source IB3[D1] = 0 ADS2 pin connected to GND Unbalanced input source IB3[D1] = 1 ADS2 pin unconnected
Balanced and unbalanced input source setting TDA1566J Balanced input source IB3[D1] = 0 default Unbalanced input source IB3[D1] = 1 not selectable
001aad009
Fig 6. Balanced (left) and unbalanced (right) input source
6.1.4 Single channel 1 operation
The input and output pins for single channel 1 operation are listed in Table 9. The 1 operation requires that on the PCB the output pins are shorted as indicated in Table 9. In the 1 operation the input signal is taken from channel 1. To prevent instability in 1 operation the amplifier must not be used in line driver mode with a load larger than 25 .
Table 9. Symbol IN2+ IN2- IN1+ IN1- 1OHM OUT1+ OUT1- OUT2+ OUT2- Pinning for the single channel 1 mode; TDA1566TH and TDA1566J Pin (TDA1566TH) 2 3 10 11 15 16 18 19 21 Pin (TDA1566J) 22 23 3 4 8 10 13 15 18 Description single channel operation disabled: connect IN2+ with 470 nF to SGND disabled: connect IN2+ with 470 nF to SGND positive input channel 1 negative input channel 1 1 select pin connected to VP positive output channel 1 negative output channel 1 shorted on board to OUT1- shorted on board to OUT1+ Description dual channel operation positive input channel 2 negative input channel 2 positive input channel 1 negative input channel 1 1 select pin connected to GND positive output channel 1 negative output channel 1 positive output channel 2 negative output channel 2
TDA1566_1
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Product data sheet
Rev. 01 -- 5 April 2006
9 of 45
Philips Semiconductors
TDA1566
I2C-bus controlled dual channel/single channel amplifier
6.1.5 Mute speed setting
In I2C-bus mode the amplifier can be muted slow (20 ms) or fast (0.1 ms). The mute speed is selected with IB2[D2]. See Section 6.4.2 for the definition of the instruction bytes. Table 10 lists the operation mode transitions where slow and fast mute are applied. The operation modes are described in Section 6.1.1, Table 5.
Table 10. Mute speed setting I2C-bus mode slow mute IB2[D2] = 0: slow mute IB2[D2] = 1: fast mute Operating to standby Operating to off slow mute fast mute n.a. fast mute Non-I2C-bus mode slow mute slow mute
Mode transition Mute to operating Operating to mute
6.1.6 Pins with double functions
Table 11. Pin PROG Pins with double functions I2C-bus mode load detection reference current programming, see Section 6.2.1 and 6.2.2 I2C-bus address select bit 1, see Section 6.4.1 I2C-bus address select bit 2, see Section 6.4.1 chip enable, see Section 6.1.1
TH version only.
Non-I2C-bus mode gain select, see Section 6.1.2
ADS1 ADS2[1] EN
[1]
non-I2C-bus mode select, see Section 6.1.1 balanced/unbalanced input, see Section 3 mode select, see Section 6.1.1
6.2 Load identification (I2C-bus mode only)
6.2.1 DC load detection
The default setting IB1[D1] = 0 disables DC load detection. When the DC load detection is enabled with IB1[D1] = 1, an offset is slowly applied at the output of the amplifiers at the beginning of the start-up cycle. The DC load is measured and compared with Rtrip1 and Rtrip2 to distinguish between an amplifier load, line driver load or open load. Rtrip1 and Rtrip2 are set with resistor RPROG (1 %) connected between the PROG pin and GND.
amplifier load 0 25 Rtrip1
line driver load 100 500 Rtrip2
open load 5 k
001aad010
Fig 7. DC load detection limits (RPROG = 1500 /1 %)
The relation between RPROG, Rtrip1 and Rtrip2 is approximated by (valid for RPROG should be between 1.2 k and 4 k):
TDA1566_1
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Product data sheet
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Philips Semiconductors
TDA1566
I2C-bus controlled dual channel/single channel amplifier
Rtrip1 = 0.1 x (RPROG - 720) Rtrip2 = 1.05 x (RPROG - 450) Rtrip1 and Rtrip2 levels presented refer to the advised value of 1500 . Note that a shorted load will be interpreted as an amplifier load. The result of the DC load detection is stored in DB1[D4] and DB1[D5] for channel 1 and in DB2[D4] and DB2[D5] for channel 2, see Table 12.
Table 12. Interpretation of DC load detection bits Description amplifier load line driver load open load invalid DC load detection result
Open load bits Amplifier load bits DC load valid bit DB1[D4] and DB2[D4] DB1[D5] and DB2[D5] DB3[D3] 0 0 1 Don't care 0 1 don't care don't care 1 1 1 0
Note that the DC load bits are only valid if DB3[D3] = 1. The DC load detection valid bit is reset, DB3[D3] = 0, when the DC load detection is started with a not completely discharged SVR capacitor (VSVR > 0.3 V) or when the DC load detection is interrupted by an engine start (VP < 7.5 V typical, see Section 9).
6.2.2 AC load detection
The AC load detection is used to detect if AC coupled speakers like tweeters are connected correctly during assembly. The detection starts when IB1[D2] changes from LOW to HIGH. A sine wave of a certain frequency (e.g. 19 kHz) needs to be applied to the inputs of the amplifier. The output voltage over the load impedance will cause an output current in the amplifier. Output currents larger than 1.15 x Iref will set the AC load detection bit and no AC load is detected when the output current is less than 0.85 x Iref, see Figure 8. The reference current Iref is set with an external resistor RPROG (1 %) connected between the PROG pin and GND. The relation between RPROG and Iref is given by: Iref = 390 / RPROG [A] (valid for RPROG between 1.2 k and 4 k). To set the AC load detection bit the peak output current must pass the 1.15 x Iref threshold three times. The three `threshold cross' counter is used to prevent false AC load detection caused by switching the input signal on or off. To reset the slope counter, IB1[D2] needs to be reset. With RPROG = 1500 the current thresholds are set to 200 mA and 320 mA.
0.78 x Iref no AC load detected 200 mA (peak) 1.22 x Iref AC load detected 320 mA (peak)
001aad011
Fig 8. AC load detection limits
The levels presented refer to the advised value of 1500 .
TDA1566_1
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Product data sheet
Rev. 01 -- 5 April 2006
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Philips Semiconductors
TDA1566
I2C-bus controlled dual channel/single channel amplifier
For instance at an output voltage of 4 V peak the total impedance must be less than 10 to detect the AC coupled load or more than 13.4 to guarantee no connected AC load is detected. Values between 10 and 13.4 cannot be recognized. The result of the AC load detection is shown in DB1[D7] for channel 1 and DB2[D7] for channel 2. When IB1[D2] = 1 the AC load detection is enabled. The AC load detection can only be performed after the amplifier has completed its start-up cycle and will not conflict with the DC load detection. The default setting of IB1[D2] = 0 disables AC load detection. Note: in the 1 mode Iref is doubled, so Iref = 2 x 390 / RPROG [A].
6.3 Diagnostic
6.3.1 Diagnostic table
The available diagnostic information is shown in Table 13 and Table 14. Refer to Table 17 and Table 18 for the bitmap of the instruction and data bytes. DIAG and CLIP have an open-drain output, are active LOW and must have an external pull-up resistor to an external voltage. DIAG shows fixed information and via the I2C-bus selectable information. This information will be seen on DIAG and CLIP as a logical OR. The temperature pre-warning diagnostic and clip information is available on the CLIP. In case of a failure, DIAG will remain LOW and the microprocessor can read out the failure information via the I2C-bus. The I2C-bus bits are set on a failure and will be reset with the I2C-bus read command. Even when the failure is removed the microprocessor will know what was wrong by reading the I2C-bus. The consequence of this procedure is that during the I2C-bus read old information is read. Most actual information will be gathered with 2 read commands after each other. DIAG will give actual diagnostic information (when selected). When a failure is removed, DIAG will be released instantly, independently of the I2C-bus latches.
Table 13. Diagnostic POR Low VP or load dump detection Clip detection Temperature pre-warning Short Speaker protection Offset detection Maximum temperature protection Load detection
TDA1566_1
Available diagnostic data TH version I2C-bus mode DIAG yes yes selectable selectable selectable selectable selectable yes CLIP no no yes yes no no no no Non-I2C-bus mode DIAG no yes no no yes yes yes yes CLIP no no yes yes no no no no
no
no
no
no
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Product data sheet
Rev. 01 -- 5 April 2006
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Philips Semiconductors
TDA1566
I2C-bus controlled dual channel/single channel amplifier
Note that in the J version no CLIP pin is available.
Table 14. Diagnostic POR Clip detection Temperature pre-warning Short Speaker protection Offset detection Maximum temperature protection Load detection Available diagnostic data J version I2C-bus mode DIAG yes selectable selectable selectable selectable selectable yes no Low VP or load dump detection yes Non-I2C-bus mode DIAG no yes yes yes yes yes no yes no
Following diagnostic information is only available via I2C-bus:
* DC and AC load detection results, see Section 6.2 * DB3[D4] is set when the DC settling of the amplifier has almost completed and the
SVR voltage has risen to a value of VP/2 or above, see Section 6.5.1
6.3.2 Diagnostic level settings
Table 15. Setting Clip detection level Temperature pre-warning level Clip and temperature pre-warning level setting I2C-bus mode IB2[D7] = 0 selects 3 % IB2[D7] = 1 selects 7 % IB3[D4] = 0 selects 145 C IB3[D4] = 1 selects 122 C 145 C Non-I2C-bus mode 3%
6.3.3 Temperature pre-warning
If in I2C-bus mode the average junction temperature reaches a by I2C-bus selectable level, the pre-warning will be activated resulting in a LOW CLIP pin. In non-I2C mode the thermal pre-warning is set on 145 C. In the TH version the thermal pre-warning is available on the CLIP pin in I2C-bus mode and non-I2C mode. In the J version the thermal pre-warning is available on the DIAG pin in non-I2C-bus mode. In I2C-bus mode the presence of the thermal pre-warning on the DIAG is selected with IB1[D4], see Section 6.3.1 and Section 6.4.2. If the temperature increases above the pre-warning level, the temperature controlled gain reduction will be activated for both channels resulting in a lower output power. If this does not reduce the average junction temperature, both channels will be switched off at the absolute maximum temperature Toff, typical 175 C.
TDA1566_1
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Product data sheet
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Philips Semiconductors
TDA1566
I2C-bus controlled dual channel/single channel amplifier
6.3.4 Speaker protection
To prevent damage of the speaker when one side of the speaker is connected to ground, see Figure 9, a `missing current protection' is implemented.
IO1
IO2
001aad012
Fig 9. Speaker protection condition
When in one BTL channel the absolute value of the current through the output terminals differ, so IO1 IO2, a fault condition is assumed, and the BTL channel will be switched off. The `speaker protection active' diagnosis options for I2C-bus and non-I2C-bus mode are listed in Table 13.
6.3.5 Offset detection
The offset detection can be performed with no input signal (for instance when the DSP is in mute after a start-up) or with input signal. In I2C-bus mode the offset bits DB1[D2] and DB2[D2] are set by executing a read command. The offset bits will be reset when the BTL output voltage Vo = VOUT1+ - VOUT1-| enters the offset threshold window of 1.5 V. The offset bits are read with a 2nd read command. In non-I2C-bus mode (or in I2C-bus mode with offset diagnostic selected on DIAG) DIAG will be pulled LOW if the BTL output voltage is more than 1.5 V.
TDA1566_1
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Product data sheet
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Philips Semiconductors
TDA1566
I2C-bus controlled dual channel/single channel amplifier
Vo = VOUT+ - VOUT-
Vo = VOUT+ - VOUT-
offset threshold
time
offset threshold
time
DB1[D2] read DIAG DB1[D2] = 1 0 0 => 1 time
Vo = VOUT+ - VOUT-
Vo = VOUT+ - VOUT-
offset threshold
time
offset threshold
time
DB1[D2] read DIAG DB1[D2] = 1 1 1 time
001aad013
I2C-bus mode only
TH version only: Non-I2C-bus mode TH/J version: I2C-bus mode with offset fault selected on DIAG
Fig 10. Offset detection in I2C-bus mode and in non-I2C-bus mode
6.4 I2C-bus operation
6.4.1 I2C-bus address with hardware address select
Table 16. ADS1 open I2C-bus address table TH version ADS2 open GND 33 k to GND open GND
[1]
A6 1 1 1 1
A5 1 1 1 1
A4 0 0 0 0
A3 1 1 1 1
A2 0 0 0 0
A1 0 0 1 1
A0 0 1 0 1
R/W[1] 1/0 1/0 1/0 1/0
0 = write to TDA1566TH; 1 = read from TDA1566TH.
Table 17. ADS1 open
I2C-bus address table J version A6 1 1 A5 1 1 A4 0 0 A3 1 1 A2 0 0 A1 0 1 A0 1 1 R/W[1] 1/0 1/0
33 k to GND
[1]
TDA1566_1
0 = write to TDA1566J; 1 = read from TDA1566J.
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Product data sheet
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Philips Semiconductors
TDA1566
I2C-bus controlled dual channel/single channel amplifier
6.4.2 Instruction bytes
If R/W bit = 0, the TDA1566 expects 3 instruction bytes; IB1, IB2 and IB3. After a power-on reset, all instruction bits are set to zero. In 1 mode the instruction bits of channel 1 are used. The instruction bits labelled `reserved for test' should be set to zero.
Table 18. Bit D7 0 1 D6 0 1 D5 0 1 D4 0 1 D3 D2 Instruction bytes Instruction byte IB2 0 1 clip detect level on 3% clip detect level on 7% 0 1 reserved for test 0 1 0 1 speaker protection or short on DIAG 0 channel 1 26 dB gain channel 1 16 dB gain channel 2 26 dB gain channel 2 16 dB gain temperature prewarning on 145 C temperature prewarning on 122 C channel 1 enabled channel 1 disabled channel 2 enabled Instruction byte IB3 reserved for test slow start enable slow start disable channel 1 no clip detect on DIAG channel 1 clip detect on DIAG channel 2 no clip detect on DIAG channel 2 clip detect on DIAG no temperature prewarning on DIAG temperature prewarning on DIAG
Instruction byte IB1
reserved for test
no speaker protection 1 or short on DIAG 0 1 0
reserved for test 0 AC load detection disabled; detection slope counter reset AC load detection enabled DC load detection disabled DC load detection enabled TDA1566 in standby TDA1566 in mute or operating (see IB2[D0])
reserved for test 0 slow mute (20 ms)
1 D1 0 1 D0 0 1
1 0 1 0 1
fast mute (0.1 ms) offset fault on DIAG no set fault on DIAG channel 1 and channel 2 operating channel 1 and channel 2 muted
1 0 1
channel 2 disabled balanced input unbalanced input
reserved for test
6.4.3 Data bytes
If R/W = 1, the TDA1566 will send 3 data bytes to the microprocessor: DB1, DB2, and DB3. All short diagnostic and offset detect bits are latched. All bits are reset after a read operation except DB1[D7], DB2[D7], DB1[D4], DB2[D4], DB1[D5] and DB2[D5]. DB1[D2] and DB2[D2] are set after a read operation, see Section 6.3.5. DB1[D7] and DB2[D7] are reset when IB1[D2] is LOW. In 1 mode the diagnostic information will be shown in DB1. The content of the bits `reserved for test' should be ignored.
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
Data bytes Data byte DB2 channel 2 0 no AC load detected Data byte DB3 both channels 0 TDA1566 in mute or operating (IB1[D0] = 1) power-on reset has occurred or TDA1566 in standby (IB1[D0] = 0) below maximum temperature maximum temperature protection activated no temperature warning temperature pre-warning active SVR below VP/2
Table 19. Bit D7
Data byte DB1 channel 1 0 no AC load detected
1
AC load detected
1
AC load detected
1
D6
0 1
no speaker fault speaker fault
0 1
no speaker fault speaker fault
0 1
D5
0 1
amplifier load (D4 = 0) 0 not valid (D4 = 1) line driver load (D4 = 0) open load (D4 = 1) 1
amplifier load (D4 = 0) 0 not valid (D4 = 1) line driver load (D4 = 0) open load (D4 = 1) amplifier load (D5 = 0) 0 line driver load (D5 = 1) 1
D4
0
amplifier load (D5 = 0) 0 line driver load (D5 = 1)
1 D3 D2 D1 D0 0 1 0 1 0 1 0 1
not valid (D5 = 0) open load (D5 = 1) no shorted load shorted load no output offset no short to VP short to VP no short to ground short to ground
1 0 1 0 0 1 0 1
not valid (D5 = 0) open load (D5 = 1) no shorted load shorted load no output offset output offset detected no short to VP short to VP no short to ground short to ground
1 0 1
SVR above VP/2 invalid DC load data valid DC load data
reserved for test reserved for test reserved for test
output offset detected 1
6.5 Timing waveforms
6.5.1 Start-up and shutdown
To prevent switch-on or switch-off pop noise, the capacitor on the SVR pin CSVR is used for smooth start-up and shutdown. During start-up and shutdown the output voltage tracks the SVR voltage. With IB1[D7] = 0 the time constant made with the SVR capacitor can be increased to reduce turn on transients at the load. Consequently the start-up time td(mute_off) increases with approximately 420 ms (VP = 14.4 V, CSVR = 22 F, Tamb = 25 C). Note that in non-I2C-bus mode the IB1[D7] = 0 setting will be used. Increasing CSVR results in a longer start-up and shutdown time. Note that a larger SVR capacitor value will also result in a longer DC load detection cycle.
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
For optimized pop performance it is recommended to keep the amplifier in mute until the SVR voltage has reached its final level. When the amplifier is switched off by pulling the EN pin LOW the amplifier is muted (fast mute) and the capacitor on the SVR pin will be discharged. With an SVR capacitor of 22 F the off current is reached 2 s after the EN pin is switched to zero. Start-up and shutdown in I2C-bus mode is shown in Figure 11 and explained in Table 20.
VP
DIAG
DB3[D7]
5 DB3[D4] 3 4 2 1 EN 6 8 7
9
IB1[D0] IB2[D0] = 0
SVR t dcload t wake OUTx t d(mute_off) t d(mute-fgain) slow mute fast mute
10
001aad014
Fig 11. Start-up and shutdown timing in I2C-bus mode Table 20. Step 1 Start-up and shutdown timing in I2C-bus mode Result DB3[D7] is set and DIAG is pulled LOW to indicate power-on reset 2 TDA1566 is switched from standby to operating with IB1[D0] = 1 DIAG is released DB3[D7] is reset SVR capacitor is charged, OUTx voltage tracks SVR voltage gradual increase of gain; when the SVR voltage increases above a threshold of 2 V + 2VBE the amplifiers operate at full gain
Action
TDA1566 is enabled with EN TDA1566 from off to standby
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
Start-up and shutdown timing in I2C-bus mode ...continued Result SVR voltage has become larger than VP/2 resulting in setting DB3[D4] TDA1566 is switched from operating to standby with IB1[D0] = 0 DIAG is pulled LOW SVR is discharged, OUTx voltage tracks SVR voltage amplifier is slow muted SVR voltage has dropped below VP/2 resulting in resetting DB3[D4] TDA1566 is switched from standby to operating with IB1[D0] = 1 TDA1566 is disabled with EN see step 2
Table 20. Step 3 4
Action
5 6
7 8
see step 3 DIAG is pulled LOW amplifier is fast muted SVR is discharged, OUTx voltage tracks SVR voltage see step 5 OUTx is at ground potential, DIAG is released, TDA1566 is off
9 10
6.5.2 Engine start
The DC-output voltage of the amplifier follows the voltage on the SVR pin. On the SVR pin a capacitor is connected which is used for start-up and shutdown timing as well as for DC load detection. If the supply voltage drops during engine start below 8.6 V the SVR capacitor will be discharged and the fast mute is activated to prevent audible transients at the output. If in I2C-bus mode the supply voltage drops below 5.5 V (see VP(POR)) the content of the I2C-bus latches cannot be guaranteed and the power-on reset will be activated: DB3[D7] = 1. All latches will be reset, the amplifier is switched off and the DIAG pin will be pulled LOW to indicate that a power-on reset has occurred. The TDA1566 will not start-up but wait for a command to start-up.
7. Limiting values
Table 21. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VP Parameter supply voltage Conditions operating; RL = 4 operating; RL = 2 or 1 non operating load dump protection; during 50 ms; tr 2.5 ms VP(r) IOSM
TDA1566_1
Min -1 -
Max 18 16 +50 50
Unit V V V V
reverse supply voltage non-repetitive peak output current
maximum 10 minutes
-
-2 13
V A
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
Table 21. Limiting values ...continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol IORM IBGM Parameter repetitive peak output current peak back gate current loss off GND or open VP application failure; supply decoupling capacitor of maximum 3 x 2200 F/16 V and a series resistance of 70 m operating, non operating operating, non operating operating, non operating operating, non operating operating, non operating operating, non operating operating, non operating operating, non operating operating, non operating operating, non operating operating, non operating operating, non operating operating, non operating operating, non operating
[1]
Conditions
Min -
Max 8 50
Unit A A
V1OHM VEN VIN1VIN1+ VIN2VIN2+ VDIAG VCLIP VPROG VSVR VSCL VSDA VADS1 VADS2 Tj Tstg Tamb V(prot)
voltage on pin 1OHM voltage on pin EN voltage on pin IN1- voltage on pin IN1+ voltage on pin IN2- voltage on pin IN2+ voltage on pin DIAG voltage on pin CLIP voltage on pin PROG voltage on pin SVR voltage on pin SCL voltage on pin SDA voltage on pin ADS1 voltage on pin ADS2 junction temperature storage temperature ambient temperature protection voltage
0 0 0 0 0 0 0 0 0 0 0 0 0 0 -55 -40
24 24 13 13 13 13 13 13 13 13 6.5 6.5 6.5 6.5 150 +150 +85 VP
V V V V V V V V V V V V V V C C C V
[1]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
AC and DC short-circuit voltage of output pins and across the load Tcase = 70 C
-
Ptot
total power dissipation
-
80
W
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
Table 21. Limiting values ...continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Vesd Parameter electrostatic discharge voltage Conditions HBM C = 100 pF; Rs = 1500 MM C = 200 pF; Rs = 10 ; L = 0.75 H
[1] [2]
Min -
Max 2000
Unit V
-
200
V
The voltage on this pin is clamped by an ESD protection. If this pin is connected to VP a series resistance of 10 k should be added. The voltage on this pin is clamped by an ESD protection.
8. Thermal characteristics
Table 22. Symbol Rth(j-c) Thermal characteristics Parameter thermal resistance from junction to case TDA1566TH TDA1566J Rth(j-a) thermal resistance from junction to ambient TDA1566TH TDA1566J in free air in free air 35 35 K/W K/W 1.0 1.0 K/W K/W Conditions Typ Unit
9. Characteristics
Table 23. Characteristics Refer to test circuit (see Figure 22); VP = 14.4 V; RL = 4 ; -40 C < Tamb < +85 C and -40 C < Tj < +150 C; unless otherwise specified. Symbol VP(oper) Iq Istb Ioff VO VP(low)(mute) VP(POR) Parameter operating supply voltage quiescent current standby current off-state current output voltage low supply voltage mute power-on reset supply voltage falling supply voltage rising supply voltage Conditions RL = 4 RL = 2 or 1 no load I2C-bus mode only VEN 0.4 V; Tj < 85 C
[1]
Min VP(low)(mute) VP(low)(mute) 6.7 6.5 7.0 4.1
Typ 14.4 14.4 180 10 2 7.2 7.2 7.6 5.0
Max 18 16 220 15 10 7.6 7.7 8.2 5.8
Unit V V mA mA A V V V V
Supply voltage behavior
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
Table 23. Characteristics ...continued Refer to test circuit (see Figure 22); VP = 14.4 V; RL = 4 ; -40 C < Tamb < +85 C and -40 C < Tj < +150 C; unless otherwise specified. Symbol VO(offset) Parameter output offset voltage Conditions amplifier mode; on line driver mode; on amplifier and line driver mode; mute Mode select pin EN (see Figure 5) VEN voltage on pin EN off condition; I2C-bus and non-I2C-bus mode standby mode; I2C-bus mode mute condition; mode non-I2C-bus
[2]
Min -50 -25 -25
Typ 0 0 0
Max +50 +25 +25
Unit mV mV mV
2.6 2.6 6.5 -
10 300
1.0 VP 4.5 VP 70 500
V V V V A s
operating condition; non-I2C-bus mode IEN twake current on pin EN wake-up time VEN = 8.5 V time after wake-up via EN pin before first I2C-bus transmission is recognized I2C-bus mode with slow start enabled and non-I2C-bus mode; DC load detection disabled CSVR = 22 F CSVR = 10 F I2C-bus mode only; DC load detection enabled; slow start enabled CSVR = 22 F CSVR = 10 F I2C-bus mode only; DC load detection disabled; slow start disabled CSVR = 22 F CSVR = 10 F I2C-bus mode only; DC load detection enabled; slow start disabled CSVR = 22 F CSVR = 10 F tdet(DCload) DC load detection time I2C-bus mode only; DC load detection enabled CSVR = 22 F CSVR = 10 F td(mute-fgain) mute to full gain delay CSVR = 22 F time CSVR = 10 F
Rev. 01 -- 5 April 2006
[3]
Start-up, shutdown and mute timing (see Figure 11)
td(mute_off)
mute off delay time
[4] [4]
-
380 170
-
ms ms
[4] [4]
-
510 250
-
ms ms
[4] [4]
-
230 110
-
ms ms
[4] [4]
-
370 180
-
ms ms
[4] [4] [5] [5]
-
160 70 90 40
-
ms ms ms ms
22 of 45
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
Table 23. Characteristics ...continued Refer to test circuit (see Figure 22); VP = 14.4 V; RL = 4 ; -40 C < Tamb < +85 C and -40 C < Tj < +150 C; unless otherwise specified. Symbol td(mute-on) Parameter mute to on delay time Conditions I2C-bus mode: IB2[D0] = 1 to 0 non-I2C-bus mode: VEN from 3.3 V to 8 V td(slow_mute) slow mute delay time I2C-bus mode: IB2[D0] = 0 to 1; IB2[D2] = 0 non-I2C-bus mode: VEN from 8 V to 3.3 V td(fast_mute) fast mute delay time on to mute in I2C-bus mode; IB2[D2] = 1; IB2[D0] = 0 to 1 on to standby in I2C-bus mode; IB2[D0] = 0; IB1[D0] = 1 to 0 on to off in I2C-bus and non-I2C-bus mode: VEN from 8 V to 0.5 V t(on-SVR) time from amplifier switch-on to SVR above VP/2 via I2C-bus (IB1[D0]) to DB3[D4] = 1 (SVR above VP/2); I2C-bus mode with slow start enabled; DC load detection disabled CSVR = 22 F CSVR = 10 F I2C-bus mode only; DC load detection enabled; slow start enabled. CSVR = 22 F CSVR = 10 F I2C-bus mode only; DC load detection disabled; slow start disabled CSVR = 22 F CSVR = 10 F I2C-bus mode only; DC load detection enabled; slow start disabled CSVR = 22 F CSVR = 10 F I2C-bus VIL(SCL) VIL(SDA) VIH(SCL) interface and 1 selection[6] 2.3 1.5 1.5 5.5 V V V LOW-level input voltage on pin SCL LOW-level input voltage on pin SDA HIGH-level input voltage on pin SCL 940 450 ms ms 810 370 ms ms 1100 530 ms ms 1000 440 ms ms 20 0.1 40 1 ms ms 20 0.1 40 1 ms ms 20 20 40 40 ms ms Min Typ 20 Max 40 Unit ms
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
Table 23. Characteristics ...continued Refer to test circuit (see Figure 22); VP = 14.4 V; RL = 4 ; -40 C < Tamb < +85 C and -40 C < Tj < +150 C; unless otherwise specified. Symbol VIH(SDA) VOL(SDA) fclk V1OHM I1OHM ISCL ISDA IADS1 Parameter HIGH-level input voltage on pin SDA LOW-level output voltage on pin SDA clock frequency voltage on pin 1OHM current on pin 1OHM current on pin SCL current on pin SDA current on pin ADS1 mono channel mode dual channel mode V1OHM = 1.5 V V1OHM = 5.5 V VSCL = 1.5 V VSCL = 5.5 V VSDA = 1.5 V VSDA = 5.5 V ADS1 pin connected to GND ADS1 pin connected via 33 k to GND IADS2 current on pin ADS2 ADS2 pin connected to GND ADS2 pin connected via 33 k to GND Diagnostic VOL(DIAG) VOL(CLIP) LOW-level output voltage on pin DIAG LOW-level output voltage on pin CLIP fault condition; IDIAG = 1 mA TH version only; clip or temperature pre-warning active; ICLIP = 1 mA 0.3 0.3 V V
[7]
Conditions
Min 2.3
Typ 400 130 300 70 300 70
Max 5.5 0.4 VP 1.5 200 5 5 5 5 5 400 100 400 100
Unit V V kHz V V A A A A A A A A A A
Iload = 5 mA
2.5 0 -
ILIH(CLIP)
HIGH-level input diagnostic, clip or temperature leakage current on pin pre-warning not activated CLIP HIGH-level input diagnostic, clip or temperature leakage current on pin pre-warning not activated DIAG threshold voltage for offset detection 7 % clip detection level (THD) 3 % clip detection level (THD) average junction temperature for pre-warning 1 average junction temperature for pre-warning 2 I2C-bus mode: IB2[D7] = 1 I2C-bus mode: IB2[D7] = 0 and non-I2C-bus mode I2C-bus mode: IB3[D4] = 0 and non-I2C-bus mode I2C-bus mode: IB3[D4] = 1
[8]
-
-
2
A
ILIH(DIAG)
-
-
2
A
Vth(offset) THDCLIP7 THDCLIP3 Tj(AV)(warn1)
1.0 -
1.5 7 3 145
2.0 -
V % % C
[8]
Tj(AV)(warn2)
-
122
-
C
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
Table 23. Characteristics ...continued Refer to test circuit (see Figure 22); VP = 14.4 V; RL = 4 ; -40 C < Tamb < +85 C and -40 C < Tj < +150 C; unless otherwise specified. Symbol Tj(AV)(G(-0.5dB)) Parameter Conditions Min Typ 155 Max Unit C average junction Vi = 0.05 V temperature for 0.5 dB gain reduction difference in junction temperature between pre-warning 1 and mute
Tj(warn1-mute)
-
10
-
C
Tj(G(-0.5-40dB)) difference in junction temperature between 0.5 dB and 40 dB gain reduction Tj(AV)(off) Zth(load) average junction temperature for off load detection threshold impedance amplifier DC load detection; I2C-bus mode only: RPROG = 1500 /1 % line driver DC load detection; I2C-bus mode only: RPROG = 1500 /1 % open load DC load detection; I2C-bus mode only: RPROG = 1500 /1 % IoM peak output current AC load bit is set; I2C-bus mode only: RPROG = 1500 /1 %; Tj > 0 C AC load bit is not set; I2C-bus mode only: RPROG = 1500 /1 %; Tj > 0 C
[9]
-
20
-
C
-
175 -
185 25
C
120
-
500
5
-
-
k
320
-
-
mA
-
-
200
mA
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
Table 23. Characteristics ...continued Refer to test circuit (see Figure 22); VP = 14.4 V; RL = 4 ; -40 C < Tamb < +85 C and -40 C < Tj < +150 C; unless otherwise specified. Symbol Amplifier Po output power RL = 4 ; VP = 14.4 V; THD = 0.5 % RL = 4 ; VP = 14.4 V; THD = 3 % RL = 4 ; VP = 14.4 V; THD = 10 % RL = 4 ; VP = 14.4 V maximum power; Vi = 2 V (RMS) square wave RL = 4 ; VP = 15.2 V maximum power; Vi = 2 V (RMS) square wave RL = 2 ; VP = 14.4 V; THD = 0.5 % RL = 2 ; VP = 14.4 V; THD = 3 % RL = 2 ; VP = 14.4 V; THD = 10 % RL = 2 ; VP = 14.4 V maximum power; Vi = 2 V (RMS) square wave RL = 1 ; VP = 14.4 V; THD = 0.5 % RL = 1 ; VP = 14.4 V; THD = 3 % RL = 1 ; VP = 14.4 V; THD = 10 % RL = 1 ; VP = 14.4 V maximum power; Vi = 2 V (RMS) square wave THD total harmonic distortion Po = 1 W to 12 W; f = 1 kHz; RL = 4 Po = 1 W to 12 W; f = 1 kHz; RL = 2 Po = 1 W to 12 W; f = 1 kHz; RL = 1 Po = 1 W to 12 W; f = 10 kHz; measured with 30 kHz filter; RL = 4 Po = 1 W to 12 W; f = 10 kHz; measured with 30 kHz filter; RL = 2 line driver mode; Vo =1 V (RMS) and 5 V (RMS); f = 20 Hz to 20 kHz; RL = 400
TDA1566_1
Parameter
Conditions
Min 24 40
Typ 22 24 28 45
Max -
Unit W W W W
45
50
-
W
39 67
37 41 46 75
-
W W W W
78 130
74 81 92 150
-
W W W W
-
0.01 0.02 0.02 0.1
0.1 0.2
% % %
0.3
%
-
0.2
0.6
%
-
0.02
0.1
%
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
Table 23. Characteristics ...continued Refer to test circuit (see Figure 22); VP = 14.4 V; RL = 4 ; -40 C < Tamb < +85 C and -40 C < Tj < +150 C; unless otherwise specified. Symbol cs SVRR CMRR Parameter channel separation supply voltage rejection ratio common-mode rejection ratio maximum common-mode voltage (RMS value) RMS noise output voltage Conditions f = 1 kHz to 10 kHz; Rs = 2 k f = 100 Hz to 10 kHz; Rs = 2 k; Vripple = 2 V (p-p) amplifier mode; Vcm = 0.3 V (p-p); f = 1 kHz to 3 kHz; Rs = 2 k f = 1 kHz; Vi = 0.5 V (RMS); amplifier mode f = 1 kHz; Vi = 1.6 V (RMS); line driver mode line driver mode; filter 20 Hz to 22 kHz; Rs = 2 k amplifier mode; filter 20 Hz to 22 kHz; Rs = 2 k mute mode; filter 20 Hz to 22 kHz; Rs = 2 k Gv(amp) Gv(ld) Zi(sym) mute Bp voltage gain amplifier mode (VOUT1+ - VOUT1-) / (VIN1+ - VIN1-) Min 42 45 40 Typ 55 70 56 Max Unit dB dB dB
Vcm(max)(rms)
25 15
[10]
20 50 20 26 16 60 80 20 to 20000
1 0.6 50 70 50 27 17 -
V V V V V dB dB k dB Hz
Vn(o)(RMS)
voltage gain line driver (VOUT1+ - VOUT1-) / mode (VIN1+ - VIN1-) symmetrical input impedance mute attenuation power bandwidth C = 470 nF f = 1 kHz; Vi = 1 V (RMS) -1 dB; C = 2.2 F
[11]
44 -
[1] [2] [3] [4] [5] [6] [7] [8] [9]
Operation above 16 V with a 2 or 1 mode with reactive load can trigger the amplifier protection. The amplifier switches off and will restart after 8 ms resulting in an `audio hole'. If the EN pin is connected with VP a series resistance of 10 k is necessary for load dump robustness. If the EN pin is left unconnected the amplifier will be switched off. The mute release is initiated when the SVR voltage increases above 3.5 V typical. Mute release is defined as the moment when the output signal has reached 10 % of the expected amplitude. Mute release is defined as the moment when the output signal has reached 10 % of the expected amplitude (Gv x Vi). Full gain is defined as the moment when the output signal has reached 90 % of the expected amplitude (Gv x Vi). Standard I2C-bus spec: maximum LOW level = 0.3 x VDD, minimum HIGH level = 0.7 x VDD. To comply with 5 V and 3.3 V logic the maximum LOW level is defined with VDD = 5 V and the minimum HIGH level with VDD = 3.3 V. If the 1 pin is connected with VP a series resistance of 10 k is necessary for load dump robustness. Clip detect is not operational for VP < 10 V. If an open load is detected the amplifier is switched in line driver mode.
[10] Rs is the total differential source resistance. -3 dB cut-off frequency is given as
1 1 ----------------------------- = ----------------------------------------------------------------- = 19 Hz assuming worst case low input resistance and 20 % spread in Ci. 2 x R i x C i 2 x 22 k x 470 nF x 0.8
[11] Power bandwidth can be limited by the -3 dB cut-off frequency, see Table note 10.
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
9.1 Performance diagrams
All graphs Tamb = 25 C.
001aad019 001aad020
102 THD (%) 10
10 THD (%) 1
1 10-1 10-1
(1)
10-2
10-2
(2) (3) (1) (2)
10-3 10-1
1
10 Po (W)
102
10-3 10
102
103
104 f (Hz)
105
RL = 4 ; 80 kHz measurement filter. (1) f = 10 kHz. (2) f = 1 kHz. (3) f = 100 Hz.
RL = 4 ; 80 kHz measurement filter. (1) Po = 1 W. (2) Po = 10 W.
Fig 12. THD as a function of output power
Fig 13. THD as a function of frequency
10 THD (%) 1
001aad021
0 SVRR (dB) -20 operating
001aad022
10-1
-40
10-2
-60
10-3
-80
10-4 10-1
1
10 Vo(rms) (V)
102
-100 10
102
103
104 f (Hz)
105
RL = 100 ; 80 kHz measurement filter; f = 1 kHz.
Rs = 1 k; CSVR = 10 F.
Fig 14. THD as a function of output voltage in line driver mode
Fig 15. SVRR as a function of frequency (operating)
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
0 SVRR (dB) -20 mute
001aad023
-50 cs (dB) -60
(1), (2)
001aad024
(3)
-40
-70
-60
-80
(1) (2)
(3)
-80
-90
-100 10
102
103
104 f (Hz)
105
-100 10
102
103
104 f (Hz)
105
Rs = 1 k; CSVR = 10 F.
(1) Rs = 0 . (2) Rs = 1 k. (3) Rs = 10 k.
Fig 16. SVRR as a function of frequency (mute)
Fig 17. Channel separation as a function of frequency
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
9.2 PCB layout
SG+S Cn5D L dVA top
external I2C supply
Vp supply external supply
1 F
I2C/gain in legacy 16 dB/I2C load detection 26 dB
1.5 k 1%
GND
10 F inputs TDA3664 + gnd + 1
IN2 + -
in
470 nF 470 nF R
prog monitor
2200 F
- +
+Vp
diagnostic LED
22 + F
2-
Rs
Zobel Zobel temperature/clip LED
2+ 1- 1+ output Vp
Sgnd + - IN1
470 nF SVR 470 nF
33 k R
legacy/I2C
ADS1 ADS2
10 k 1.5 k 3.6 V
Jp I2C
D0 D2 D4
enable
GND sense
device off device operating device mute legacy mode control
legacy input unbalanced legacy input balanced mode select address select
D6
TDA1566TH
stereo
Philips Semiconductors SRK ver. 1e
001aad688
Fig 18. PCB layout TDA1566TH, components top
TDA1566_1
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I2C-bus controlled dual channel/single channel amplifier
top
1
24
12
13
001aad696
Fig 19. PCB layout TDA1566TH, components bottom
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
ADS1
S2 S7
SDA
SCL
X2
1
GND +5VA
GND EXT-I2C
OUT2+
R2 C6
APPL-BOARD-TDA1566J-DB527 7322-448-07651 IN1+
C11
IN1+DC
1
IN1-
C12
IN1-DC
SGND IN2+
C13
IN2+DC
IN2-
C14
IN2-DC
C7
VP
S4 S6 V1 S5 J7 1
+
GND
EN
SVR DIAG/CLIP GND PROG
Fig 20. PCB layout TDA1566J, components top
TDA1566_1
Product data sheet
Rev. 01 -- 5 April 2006
+
+
C9
C10
J1
OUT2-
1
OUT1+ VP
J8 1 J9 1
OUT1-
X1
C15
R9 R1
S1
1E
001aad689
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
A1
R6
C8
C5
R8
R7
R4
001aad708
Fig 21. PCB layout TDA1566J, components bottom
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
10. Test information
+5 V
2200
F
220 nF (1)
(4)
ADS2 8
ADS1 9
SDA 6
SCL 5
VP1 14
VP2 23 22 PROG
(2)
10 k
VP 10 k
13 CLIP EN 7 STAND-BY /MUTE I 2 C-BUS SELECT DIAGNOSTIC /CLIP DETECT
(3)
1 DIAG
0.5Rs 0.5Vin
470 nF C
IN1+ 10
MUTE
16 OUT1+ 26 dB/ 16 dB 18 OUT1- RL
0.5Vin 0.5Rs
470 nF C
IN1- 11
MUTE
PROTECTION /DIAGNOSTIC
0.5Rs 0.5Vin
470 nF C
IN2+ 2
MUTE
19 OUT2+ 26 dB/ 16 dB 21 OUT2- PROTECTION /DIAGNOSTIC RL
0.5Vin 0.5Rs Vcm
470 nF C
IN2- 3
VP MUTE
TDA1566TH
4 SVR
22 F
12 SGND
17 PGND1
20 PGND2
24 TAB
15 1OHM
001aad015
(1) The 220 nF capacitor should be placed close to the VP and PGND pins of the IC. (2) In non-I2C-bus mode the PROG pin should be left unconnected for 26 dB gain selection or connected via a resistor of 1500 to GND for 16 dB gain selection. (3) CLIP is not available in the DBS27P version. (4) In non-I2C-bus mode (ADS1 pin connected to GND) and balanced input source (ADS2 pin connected to GND) selected. ADS2 is not available in DBS27P version.
Fig 22. Non-I2C-bus mode (26 dB gain)
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
2200
F
220 nF (1)
(4)
connected to microcontroller ADS1 9 SDA 6 SCL 5 VP1 14 VP2 23 22 PROG
(2)
+5 V
10 k
VP
ADS2 8
RPROG 1500 (1 %)
13 CLIP connected to microcontroller EN 7 STAND-BY /MUTE I 2 C-BUS SELECT DIAGNOSTIC /CLIP DETECT
(3)
1 DIAG
0.5Rs 0.5Vin
470 nF C
IN1+ 10
MUTE
16 OUT1+ 26 dB/ 16 dB 18 OUT1- RL
0.5Vin 0.5Rs
470 nF C
IN1- 11
MUTE
PROTECTION /DIAGNOSTIC
0.5Rs 0.5Vin
470 nF C
IN2+ 2
MUTE
19 OUT2+ 26 dB/ 16 dB 21 OUT2- PROTECTION /DIAGNOSTIC RL
0.5Vin 0.5Rs Vcm
470 nF C
IN2- 3
VP MUTE
TDA1566TH
4 SVR
22 F
12 SGND
17 PGND1
20 PGND2
24 TAB
15 1OHM
001aad016
(1) The 220 nF capacitor should be placed close to the VP and PGND pins of the IC. (2) RPROG defines the trip levels for the AC and DC load detection. (3) CLIP is not available in DBS27P version. (4) I2C-bus mode is selected with ADS1 open. ADS2 is not available in DBS27P version.
Fig 23. I2C-bus mode
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
+5 V
2200
F
220 nF (1)
(4)
ADS2 8
ADS1 9
SDA 6
SCL 5
VP1 14
VP2 23 22 PROG
(2)
10 k
VP 10 k
13 CLIP EN 7 STAND-BY /MUTE I 2 C-BUS SELECT DIAGNOSTIC /CLIP DETECT
(3)
1 DIAG
0.5Rs 0.5Vin
470 nF C
IN1+ 10
MUTE
16 OUT1+ 26 dB/ 16 dB 18 OUT1-
RL 1
0.5Vin 0.5Rs
470 nF C
IN1- 11
MUTE
PROTECTION /DIAGNOSTIC
470 nF C
IN2+ 2
MUTE
19 OUT2+ 26 dB/ 16 dB 21 OUT2- PROTECTION /DIAGNOSTIC
470 nF C Vcm
IN2- 3
VP MUTE
TDA1566TH
4 SVR
22 F
12 SGND
17 PGND1
20 PGND2
24 TAB
15 1OHM
10 k
001aad017
connected to VP
(1) The 220 nF capacitor should be placed close to the VP and PGND pins of the IC. (2) In non-I2C-bus mode the PROG pin should be left unconnected for 26 dB gain selection or connected via a resistor of 1500 to GND for 16 dB gain selection. (3) CLIP is not available in the DBS27P version. (4) In non-I2C-bus mode (ADS1 pin connected to GND) and balanced input source (ADS2 pin connected to GND) selected. ADS2 is not available in DBS27P version.
Fig 24. Non-I2C-bus mode (1 mode and 26 dB gain)
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
2200
F
220 nF (1)
(4)
connected to microcontroller ADS1 9 SDA 6 SCL 5 VP1 14 VP2 23 22 PROG
(2)
+5 V
10 k
VP
ADS2 8
RPROG 1500 (1 %)
13 CLIP connected to microcontroller EN 7 STAND-BY /MUTE I 2 C-BUS SELECT DIAGNOSTIC /CLIP DETECT
(3)
1 DIAG
0.5Rs 0.5Vin
470 nF C
IN1+ 10
MUTE
16 OUT1+ 26 dB/ 16 dB 18 OUT1-
RL 1
0.5Vin 0.5Rs
470 nF C
IN1- 11
MUTE
PROTECTION /DIAGNOSTIC
470 nF C
IN2+ 2
MUTE
19 OUT2+ 26 dB/ 16 dB 21 OUT2- PROTECTION /DIAGNOSTIC
470 nF C Vcm
IN2- 3
VP MUTE
TDA1566TH
4 SVR
22 F
12 SGND
17 PGND1
20 PGND2
24 TAB
15 1OHM
10 k
001aad018
connected to VP
(1) The 220 nF capacitor should be placed close to the VP and PGND pins of the IC. (2) RPROG defines the trip levels for the AC and DC load detection. (3) CLIP is not available in the DBS27P version. (4) I2C-bus mode is selected with ADS1 open. ADS2 is not available in DBS27P version.
Fig 25. I2C-bus mode (1 mode)
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
11. Package outline
HSOP24: plastic, heatsink small outline package; 24 leads; low stand-off height SOT566-3
E D x
A X
c y E2 HE vM A
D1 D2 1 pin 1 index Q A2 E1 A4 Lp detail X 24 Z e bp 13 wM (A3) A 12
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A A2 max. 3.5 3.5 3.2 A3 0.35 A4(1) bp c D(2) D1 D2 1.1 0.9 E(2) 11.1 10.9 E1 6.2 5.8 E2 2.9 2.5 e 1 HE 14.5 13.9 Lp 1.1 0.8 Q 1.7 1.5 v w x y Z 2.7 2.2 8 0
+0.08 0.53 0.32 16.0 13.0 -0.04 0.40 0.23 15.8 12.6
0.25 0.25 0.03 0.07
Notes 1. Limits per individual lead. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT566-3 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION
ISSUE DATE 03-02-18 03-07-23
Fig 26. Package outline SOT566-3 (HSOP24)
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
DBS27P: plastic DIL-bent-SIL (special bent) power package; 27 leads (lead length 6.8 mm)
SOT827-1
non-concave x Dh
D Eh
view B: mounting base side
d
A2
B j E A L3 L4
L 1 Z e1 e bp 27 wM Q m c e2 L2 vM
0
10 scale
20 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 19 A2 bp c 0.5 0.3 D(1) d Dh 12 E(1) 15.9 15.5 e 2 e1 1 e2 4 Eh 8 j 3.4 3.1 L 6.8 L2 3.9 3.1 L3 L4 m 4 Q 2.1 1.8 v 0.6 w x Z(1) 1.8 1.2
4.65 0.60 4.35 0.45
29.2 25.8 28.8 25.4
1.15 22.9 0.85 22.1
0.25 0.03
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT827-1 REFERENCES IEC --JEDEC --JEITA --EUROPEAN PROJECTION
ISSUE DATE 03-07-29
Fig 27. Package outline SOT827-1 (DBS27P)
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
12. Handling information
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be completely safe you must take normal precautions appropriate to handling integrated circuits.
13. Soldering
13.1 Introduction
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing.
13.2 Through-hole mount packages
13.2.1 Soldering by dipping or by solder wave
Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 C or 265 C, depending on solder material applied, SnPb or Pb-free respectively. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit.
13.2.2 Manual soldering
Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 C and 400 C, contact may be up to 5 seconds.
13.3 Surface mount packages
13.3.1 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
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I2C-bus controlled dual channel/single channel amplifier
Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 seconds and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 C to 260 C depending on solder paste material. The top-surface temperature of the packages should preferably be kept:
* below 225 C (SnPb process) or below 245 C (Pb-free process)
- for all BGA, HTSSON..T and SSOP..T packages - for packages with a thickness 2.5 mm - for packages with a thickness < 2.5 mm and a volume 350 mm3 so called thick/large packages.
* below 240 C (SnPb process) or below 260 C (Pb-free process) for packages with a
thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages. Moisture sensitivity precautions, as indicated on packing, must be respected at all times.
13.3.2 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
* Use a double-wave soldering method comprising a turbulent wave with high upward
pressure followed by a smooth laminar wave.
* For packages with leads on two sides and a pitch (e):
- larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end.
* For packages with leads on four sides, the footprint must be placed at a 45 angle to
the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 C or 265 C, depending on solder material applied, SnPb or Pb-free respectively. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
13.3.3 Manual soldering
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 seconds to 5 seconds between 270 C and 320 C.
13.4 Package related soldering information
Table 24. Mounting Through-hole mount Through-hole-surface mount Surface mount Suitability of IC packages for wave, reflow and dipping soldering methods Package[1] CPGA, HCPGA DBS, DIP, HDIP, RDBS, SDIP, SIL PMFP[4] Soldering method Wave suitable suitable[3] not suitable Reflow[2] - - not suitable suitable Dipping - suitable - -
BGA, HTSSON..T[5], LBGA, not suitable LFBGA, SQFP, SSOP..T[5], TFBGA, VFBGA, XSON DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC[7], SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP CWQCCN..L[10], WQCCN..L[10] not suitable[6]
suitable
-
suitable not not recommended[7][8] recommended[9]
suitable suitable suitable not suitable
- - - -
not suitable
[1] [2]
For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy from your Philips Semiconductors sales office. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. Hot bar soldering or manual soldering is suitable for PMFP packages. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 C 10 C measured in the atmosphere of the reflow oven. The package body peak temperature must be kept as low as possible. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
[3] [4] [5]
[6]
[7] [8] [9]
[10] Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted on flex foil. However, the image sensor package can be mounted by the client on a flex foil by using a hot bar soldering process. The appropriate soldering profile can be provided on request.
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
14. Revision history
Table 25. Revision history Release date 20060405 Data sheet status Product data sheet Change notice Supersedes Document ID TDA1566_1 (9397 750 15043)
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
15. Legal information
15.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.semiconductors.philips.com.
15.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Philips Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Philips Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
to result in personal injury, death or severe property or environmental damage. Philips Semiconductors accepts no liability for inclusion and/or use of Philips Semiconductors products in such equipment or applications and therefore such inclusion and/or use is for the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- Philips Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.semiconductors.philips.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by Philips Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
15.3 Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, Philips Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- Philips Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- Philips Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a Philips Semiconductors product can reasonably be expected
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. I2C-bus -- logo is a trademark of Koninklijke Philips Electronics N.V.
16. Contact information
For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
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TDA1566
I2C-bus controlled dual channel/single channel amplifier
17. Contents
1 2 3 4 5 5.1 5.2 6 6.1 6.1.1 6.1.2 6.1.2.1 6.1.2.2 6.1.3 6.1.4 6.1.5 6.1.6 6.2 6.2.1 6.2.2 6.3 6.3.1 6.3.2 6.3.3 6.3.4 6.3.5 6.4 6.4.1 6.4.2 6.4.3 6.5 6.5.1 6.5.2 7 8 9 9.1 9.2 10 11 12 13 13.1 13.2 13.2.1 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 Functional description . . . . . . . . . . . . . . . . . . . 7 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Mode selection . . . . . . . . . . . . . . . . . . . . . . . . . 7 Gain selection . . . . . . . . . . . . . . . . . . . . . . . . . . 8 I2C-bus mode . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Non-I2C-bus mode . . . . . . . . . . . . . . . . . . . . . . 8 Balanced and unbalanced input sources . . . . . 9 Single channel 1 W operation. . . . . . . . . . . . . . 9 Mute speed setting . . . . . . . . . . . . . . . . . . . . . 10 Pins with double functions . . . . . . . . . . . . . . . 10 Load identification (I2C-bus mode only) . . . . . 10 DC load detection . . . . . . . . . . . . . . . . . . . . . . 10 AC load detection . . . . . . . . . . . . . . . . . . . . . . 11 Diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Diagnostic table . . . . . . . . . . . . . . . . . . . . . . . 12 Diagnostic level settings . . . . . . . . . . . . . . . . . 13 Temperature pre-warning . . . . . . . . . . . . . . . . 13 Speaker protection . . . . . . . . . . . . . . . . . . . . . 14 Offset detection. . . . . . . . . . . . . . . . . . . . . . . . 14 I2C-bus operation . . . . . . . . . . . . . . . . . . . . . . 15 I2C-bus address with hardware address select 15 Instruction bytes . . . . . . . . . . . . . . . . . . . . . . . 16 Data bytes. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Timing waveforms. . . . . . . . . . . . . . . . . . . . . . 17 Start-up and shutdown . . . . . . . . . . . . . . . . . . 17 Engine start . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 19 Thermal characteristics. . . . . . . . . . . . . . . . . . 21 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 21 Performance diagrams . . . . . . . . . . . . . . . . . . 28 PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Test information . . . . . . . . . . . . . . . . . . . . . . . . 34 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 38 Handling information. . . . . . . . . . . . . . . . . . . . 40 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Through-hole mount packages . . . . . . . . . . . . 40 Soldering by dipping or by solder wave . . . . . 40 13.2.2 13.3 13.3.1 13.3.2 13.3.3 13.4 14 15 15.1 15.2 15.3 15.4 16 17 Manual soldering . . . . . . . . . . . . . . . . . . . . . . Surface mount packages . . . . . . . . . . . . . . . . Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . Manual soldering . . . . . . . . . . . . . . . . . . . . . . Package related soldering information . . . . . . Revision history . . . . . . . . . . . . . . . . . . . . . . . Legal information . . . . . . . . . . . . . . . . . . . . . . Data sheet status . . . . . . . . . . . . . . . . . . . . . . Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . Contact information . . . . . . . . . . . . . . . . . . . . Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 40 40 41 42 42 43 44 44 44 44 44 44 45
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) Koninklijke Philips Electronics N.V. 2006.
All rights reserved.
For more information, please visit: http://www.semiconductors.philips.com. For sales office addresses, email to: sales.addresses@www.semiconductors.philips.com. Date of release: 5 April 2006 Document identifier: TDA1566_1


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